Lead DFT and Post-Silicon engineering teams, defining and implementing DFT architectures for complex SoCs and chiplets, optimizing test strategies for mass production, and collaborating cross-functionally to ensure high yield and quality....
My client is seeking a highly skilled and experienced Senior DFT (Design for Testability) and Post-Silicon Lead to join their team. This role is pivotal in driving the implementation of DFT strategies for complex SoCs (System on Chips) and
A leading technology firm based in Barcelona is seeking an experienced DFT Engineer to lead chip-level Design for Test execution. Todas las habilidades, cualificaciones y experiencia relevantes que necesitará un candidato seleccionado se enumeran en la siguiente descripción.
Experteer Overview Habilidades, experiencia, cualificaciones. Si tiene el perfil adecuado para esta oportunidad, asegúrese de inscribirse hoy mismo. As Senior DFT and Post-Silicon Lead, you will drive DFT strategy, architectures, and post-silicon validation for complex SoCs and chiplets in
About Analog DevicesAnalog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions
Aion Silicon is seeking a Principal Physical Design Engineer to lead full-chip implementation of complex SoCs/ASICs. You will own the complete flow from RTL handoff to GDSII, collaborating with RTL, STA, DFT, packaging and foundry partners globally.The role
Are you an experienced DFT Engineer looking for your next challenge?Aion Silicon is actively building a pipeline of talented engineers for future opportunities, and we’d love to hear from skilled professionals who are passionate about Design for
Are you an experienced DFT Engineer looking for your next challenge? Asegúrese de presentar su candidatura con toda la información solicitada, tal como se expone en la descripción del puesto a continuación. Aion Silicon is actively building
Job Summary Por favor, lea detenidamente la siguiente descripción del puesto para asegurarse de que encaja con el perfil antes de enviar su solicitud. A Mixed-Signal Design & Verification Lead will lead, train and mentor the MPS Mixed-Signal
Who We Are Obtenga más información sobre este puesto leyendo los detalles a continuación y luego envíe su solicitud para ser considerado. Neuroelectrics is a creative, high‑tech company offering the best‑in‑class non‑invasive and high‑definition electrical brain
About the job: Head of Manufacturing, Assembly, Integration, and Testing (MAITE) Head of Manufacturing, Assembly, Integration, and Testing (MAITE) | Satellite Operations Role Overview An exceptional executive leadership opportunity has opened for a visionary Head of
Role Highlights Compruebe a continuación si tiene lo necesario para esta oportunidad y, si es así, envíe su solicitud lo antes posible. Title: Software AIT Engineer Department: Global Manufacturing Organisation Reports to: Head of MAITE Spain
Your missionWe are scientists, doctors, techies and humanity lovers, with the mission of building neuroelectronic interfaces to cure brain disorders. INBRAIN harnesses the extraordinary material properties of Graphene, the world’s thinnest and nobel-prize winning material, to
About Us Quadrivia is the health technology company behind Q, a comprehensive, controllable, and customizable assistant AI built by clinicians, for clinicians. Addressing the urgent shortage of healthcare professionals, Q provides real-time, personal, and reliable support
Principal Physical Design Engineer (Full Chip Expert)Location: Global / HybridDepartment: EngineeringReports to: Physical Design Function LeadJoin Aion Silicon and Shape the Future of Semiconductor InnovationAt Aion Silicon, we\re seeking an experienced Principal Physical Design Engineer to
Role Highlights: Title: Power AIT Engineer Department: Global Manufacturing Organization Reports to: Head of MAITE Spain Location: València, Spain Type of Contract: Permanent Working model: On-site Employment is subject to applicable security screening (incl. SUPO, where
Capgemini Engineering is seeking a Senior RTL Engineer to own feasibility studies, define system architecture, and develop microarchitecture and logic for complex designs. You will code RTL, perform lint and CDC checks, and generate timing constraints
We are scientists, doctors, techies and humanity lovers, with the mission of building neuroelectronic interfaces to cure brain disorders. INBRAIN harnesses the extraordinary material properties of Graphene, the world’s thinnest and nobel-prize winning material, to build
At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the world’s most innovative companies unleash their potential. From autonomous cars to life‑saving robots,
Capgemini Engineering is seeking a Senior RTL Engineer to own feasibility studies, define system architecture, and develop microarchitecture and logic for complex designs. You will code RTL, perform lint and CDC checks, and generate timing constraints